1. Field of the Invention
This invention relates to an optical disk recording system which records an information signal on an optical disk by the presence and absence of a pit and the length of a pit, and in particular to feedback servo for beam power control, tracking control and focus control in that system.
2. Description of the Prior Arts
Japanese Patent Kokai No. 61-16044 discloses such a beam power control apparatus as described above.
FIG. 1 is a block diagram which shows a beam power control apparatus having substantially the same construction as that apparatus.
Referring to FIG. 1, a semiconductor laser 1 as beam generating means is provided in a recording head for an optical disk, and emits an optical beam for recording on the optical disk. The emitted light intensity from the laser 1 is detected by writing light intensity detecting means. The writing light intensity detecting means includes an internal light receiving element in the laser unit (a laser module with a monitoring output terminal) such as a photodiode, or an external light receiving element which is provided with an optical receiving path through an optical system (not shown). A light receiving output of the photodiode 2 is supplied to each of an upper sample-and-hold circuit 4H and a lower sample-and-hold circuit 4L through an amplifier 3 as a detection signal.
The detection signal is sample-and-held by the upper sample-and-hold circuit 4H, and then supplied to a negative input terminal of a subtracter 10H. A reference signal Vp having a predetermined higher level is applied to a positive input terminal of the subtracter 10H. The reference signal establishes a target value for the upper servo control, i.e. the level corresponding to the peak value of the emitting light intensity of the laser 1 which should be kept constant. The subtracter 10H subtracts the detection signal from the reference signal. The output of the subtracter 10H is then supplied to a writing current source 6H through a loop filter 5H. The current source 6H supplies an electric current to one terminal of an adder 8 through a switching circuit 7 in accordance with the output level of loop filter 5H. The current has the level corresponding to that of the detection signal which is sample-and-held by sample-and-hold circuit 4H.
On the other hand, the detection signal which is sample-and-held by the lower sample-and-hold circuit 4L is supplied to a negative input terminal of a subtracter 10L. A reference signal Vb having a predetermined lower level is applied to a positive input terminal of the subtracter 10L. The reference signal establishes a target value for the lower servo control i.e. the level corresponding to the bottom value of the emitting light intensity of the laser 1 which should be kept constant. The subtracter 10L subtracts the detection signal from the reference signal. The output of the subtracter 10L is supplied to a bottom current source 6L through a loop filter 5L. The current source 6L supplies an electric current to the other terminal of the adder 8 in accordance with the output level of loop filter 5L. The current has the level corresponding to that of the detection signal which is sample-and-held by sample-and-hold circuit 4L.
The added output from the adder 8 is supplied to the laser 1 as a driving signal.
A sample pulse generator 9 generates sample pulses SPH and SPL which decide the sampling timings of the upper and lower sample-and-hold circuits 4H and 4L. The sample pulse generator 9 produces not only sample pulses SPH, SPL but also a writing signal WRDATA based on an original writing signal SDATA functioning as an information signal which should be recoded. The sample pulses SPH, SPL correspond to each of the runs (lower and higher level holding durations) of the writing signal. The writing signal WRDATA is supplied to the switching circuit 7 as a switching control signal, that is, the writing signal WRDATA causes the laser 1 to turn on or off for recording.
FIG. 2 illustrates a block diagram showing the details of the structure of the above sample pulse generator 9, in which a writing original signal (original writing pulse) SDATA supplied serially is delayed by a delay circuit 91 and then supplied to one terminal of a NAND gate 92. To the other terminal of the NAND gate 92 the undelayed writing original signal SDATA is supplied directly. An output of the NAND gate 92 passes through an inverter 93 and becomes an input sample pulse SPH of the upper sample-and-hold circuit 4H. The writing original signal delayed by the delay circuit 91 also is supplied to one terminal of a NAND gate 96 through an inverter 94. To the other terminal of the NAND gate 96, the undelayed writing original signal SDATA is supplied through an inverter 95. An output of the NAND gate 96 passes through an inverter 97 and then become an input sample pulse SPL of the lower sample-and-hold circuit 4L. The writing original signal SDATA is taken as a writing signal WRDATA by itself.
FIG. 3 illustrates a timing diagram of the operation of the beam power control apparatus described above.
The writing original signal SDATA shown in (a) of FIG. 3 consists of a rectangular wave signal which takes either predetermined lower or higher levels alternatively, which is delayed by the delay circuit 91, so that it comes to have a predetermined delay width D, as shown in (b) of FIG. 3. The logical circuits 92-97 perform logical conjunctions these delayed and undelayed signals, then the upper sample pulse SPH and the lower sample pulse SPL are obtained as shown in (c) and (d) of FIG. 3. If the output detection signal from the sensor amplifier 3 has a waveform like that shown in (e) of FIG. 3 in response to the writing original signal of (a) of FIG. 3, the upper sample pulse SPH and the lower sample pulse SPL cause the upper and lower sample-and-hold circuits 4H and 4L to sample-and-hold the higher and lower levels of the detection signal, respectively.
Described above, after the detection signal sample-and-held is supplied to each of the subtracters 10H and 10L and is then subtracted from the reference signals respectively, each of the signals corresponding to resultant differences of the subtraction is supplied to the writing current source 6H and the bottom current source 6L through the loop filters 5H and 5L, respectively, so that each of the current sources can generate a driving current flow which will keep the laser power constant. In other words, if the switching circuit 7 is turned on when the writing original signal SDATA takes the higher level, a driving current flow is applied to the laser 1 in the manner that all of the laser 1, the photodiode 2, the amplifier 3, the upper sample-and-hold circuit 4H, the subtracter 10H, the loop filter 5H, the writing current source 6H and the adder 8 provide a servo loop and that the laser emitting light intensity corresponding to the level of the reference signal Vp should keep constant. If the switching circuit 7 is turned off when the writing original signal SDATA takes the lower level, a driving current flow is applied to the laser 1 in the manner that all of the laser 1, the photodiode 2, the amplifier 3, the lower sample-and-hold circuit 4L, the subtracter 10L, the loop filter 5L, the bottom current source 6L and the adder 8 provide a servo loop and that the laser emitting light intensity corresponding to the level of the reference signal Vb should keep constant.
In the feedback control system for the laser beam intensity described above, the higher bit rate of the writing pulse (writing original signal), it becomes more necessary for the sampling circuit and the light power detecting system (including the photodiode 2 and the sensor amplifier 3) to improve the response (high frequency characteristic).
However, to improve the responses of the individual circuit and element has a limit, so that it is expected that a quite novel technology would enable the fast acceleration of the writing pulse bit rate.